Lower Bounds for Circuits with Few Modular and Symmetric Gates

نویسندگان

  • Arkadev Chattopadhyay
  • Kristoffer Arnsfelt Hansen
چکیده

We consider constant depth circuits augmented with few modular, or more generally, arbitrary symmetric gates. We prove that circuits augmented with o(log n) symmetric gates must have size n n) to compute a certain (complicated) function in ACC. This function is also hard on the average for circuits of size n logn augmented with o(log n) symmetric gates, and as a consequence we can get a pseudorandom generator for circuits of size m containing o( √ logm) symmetric gates. For a composite integer m having r distinct prime factors, we prove that circuits augmented with s MODm gates must have size n Ω( 1 s log 1 r−1 n) to compute MAJORITY or MODl, if l has a prime factor not dividing m. For proving the latter result we introduce a new notion of representation of boolean function by polynomials, for which we obtain degree lower bounds that are of independent interest.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Lower Bounds for (MOD p - MOD m) Circuits

Modular gates are known to be immune for the random restriction techniques of Ajtai Ajt83], Furst, Saxe, Sipser FSS84], Yao Yao85] and H astad H as86]. We demonstrate here a random clustering technique which overcomes this diiculty and is capable to prove generalizations of several known modular circuit lower bounds of Barrington, Straubing, Th erien BST90], Krause and Pudll ak KP94], and other...

متن کامل

Lower Bounds for Circuits with Few Modular Gates using Exponential Sums

AC 0 circuits of size n log n augmented with log n MODm gates, for every odd integer m and any sufficiently small . As a consequence, for every odd integer m, we obtain a pseudorandom generator, based on the MOD2 function, for circuits of size S containing log S MODm gates. Our results are based on recent bounds of exponential sums that were previously introduced for proving lower bounds for MA...

متن کامل

Bounded Depth Circuits with Weighted Symmetric Gates: Satisfiability, Lower Bounds and Compression

A Boolean function f : {0, 1} → {0, 1} is weighted symmetric if there exist a function g : Z → {0, 1} and integers w0, w1, . . . , wn such that f(x1, . . . , xn) = g(w0 + ∑n i=1 wixi) holds. In this paper, we present algorithms for the circuit satisfiability problem of bounded depth circuits with AND, OR, NOT gates and a limited number of weighted symmetric gates. Our algorithms run in time sup...

متن کامل

Depth Reduction for Circuits with a Single Layer of Modular Counting Gates

We consider the class of constant depth AND/OR circuits augmented with a layer of modular counting gates at the bottom layer, i.e AC◦MODm circuits. We show that the following holds for several types of gates G: by adding a gate of type G at the output, it is possible to obtain an equivalent probabilistic depth 2 circuit of quasipolynomial size consisting of a gate of type G at the output and a ...

متن کامل

A Design Methodology for Reliable MRF-Based Logic Gates

Probabilistic-based methods have been used for designing noise tolerant circuits recently. In these methods, however, there is not any reliability mechanism that is essential for nanometer digital VLSI circuits. In this paper, we propose a novel method for designing reliable probabilistic-based logic gates. The advantage of the proposed method in comparison with previous probabilistic-based met...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2005